Posts about A12 Bionic
| SoC | Node | Die size | MTransistors | MT/mm2 |
|---|---|---|---|---|
| A10 | 16nm FF | 125 mm2 | 3300 | 26,4 |
| A11 | 10nm FF | 87,6 mm2 | 4300 | 49,1 |
| A12 | 7nm FF | 83,3 mm2 | 6900 | 82,8 |
Sources: Tech Insights, Wikipedia
The Apple A12 contains 6,9 billion transistors on a die of 83,3 mm2. The density is 82,8 million transistors per mm2, 67,4% higher than the 49,1 Mtrans/mm2 of the A11. It's 211,3% higher than the 16nm FF process used by the A10, which is only 2 years old.
It will be very interesting what AMD and Nvidia could do given 3x the transistor density of 7nm FF compared to 16nm FF.
Tech Insights released a die shot with floor plan today (mirror). That means it's time for me to estimated how a more powerfull A12X could look like!
First some stats measures from the floor plan. We know that the A12 die size is 9.89mm x 8.42mm = 83.27 mm2 and contains 6.9 billion transistors.
| Part (A12) | Area | MTransistors | Percentage |
|---|---|---|---|
| Big CPU (2x Vortex) | 3,83 mm2 | 317 | 4,6% |
| Little CPU (4x Tempest | 6,07 mm2 | 503 | 7,3% |
| L2 cache (8 MB) | 3,34 mm2 | 277 | 4,0% |
| DDR Logic (64-bit) | 2,56 mm2 | 212 | 3,1% |
| GPU (4 clusters) | 12,90 mm2 | 1069 | 15,5% |
| NPU (8 clusters) | 5,53 mm2 | 458 | 6,6% |
| Total of above parts | 34,23mm2 | 2836 | 41,1% |
You can see the area's on this floor plan.
All the above are measured values. If you don't like speculation and calculated guess, don't read further.
The Big CPU cluster seems a little small compared to the Litte CPU cluster, a big core should be at least twice the size of a little core. But let's assume that they are right.
So let's build a A12X. I made the following modifications for my theoretical A12X.
Doubled Big CPU cores (2 to 4 Vortex cores)
Doubled the L2 cache (8 to 16 MB)
Doubled the GPU (4 to 8 clusters)
Made the NPU 50% larger (8 to 12 clusters)
Doubled the DDR Logic interface (64-bit to 128-bit)
That would give the following values:
| Part (A12X) | Area | MTransistors |
|---|---|---|
| Big CPU (4x Vortex) | 7,66 mm2 | 635 |
| Little CPU (4x Tempest | 6,07 mm2 | 503 |
| L2 cache (16 MB) | 6,58 mm2 | 554 |
| DDR Logic (128-bit) | 5,12 mm2 | 424 |
| GPU (8 clusters) | 25,80 mm2 | 2138 |
| NPU (12 clusters) | 8,30 mm2 | 687 |
| Total of above parts | 59,63mm2 | 4941 |
So far I added about 2,1 billion transistors and about 25,4mm2. We also have to take interconnect into account, even Apple can't magically teleport data to different parts of the chip, so let's add 20% extra for interconnect logic (this is a guess). Also I want a larger video decoder and display pipeline for the high-res 120Hz iPad screens, so let's add 4mm2 for that (plus 20% interconnect).
Now our A12X measures 83,27mm2 + (25,4 mm2 + 4 mm2) * 1,2 = 118,5mm2, containing 9,8 billion transistors. It's 42% bigger than our A12. Sounds about right, and I think we can expect something like this from Apple in the near future.
Edit: As always, AnandTech did a much better job than both Tech Insights and me. Read their analysis here: TechInsights Publishes Apple A12 Die Shot: Our Take
