Shmoo plot
In electrical engineering, a shmoo plot is a graphical display of the response of a component or system varying over a range of conditions and inputs. Often used to represent the results of the testing of complex electronic systems such as computers or integrated circuits such as DRAMs, ASICs or microprocessors. The plot usually shows the range of conditions in which the device under test operates (in adherence with some remaining set of specifications). The term was in use in 1970 to refer to the "tuning" of ferrite core memory stacks on IBM systems.
For example, when testing semiconductor memory: voltages, temperature, and refresh rates can be varied over specified ranges and only certain combinations of these factors will allow the device to operate. Plotted on independent axes (voltage, temperature, refresh rates), the range of working values will enclose a three-dimensional, usually oddly-shaped volume. Other examples of conditions and inputs that can be varied include frequency, temperature, timing parameters, system- or component-specific variables, and even varying knobs tweakable during silicon chip fabrication producing parts of varying quality which are then used in the process.
Often one 'knob' or variable is plotted on one axis against another knob or variable on another axis, producing a two-dimensional graph. This allows the test engineer to visually observe the operating ranges of the device under test. This process of varying the conditions and inputs to the component or system may sometimes be referred to as 'shmooing' but more officially known as electrical testing or qualification. Automatic test equipment often contains software features that allow automated shmooing of a part.
Origin[edit]
The shmoo plot was invented by VLSI Hall Of Fame inductee Robert Huston.
Etymology[edit]
The plot takes its name from the Shmoo, a fictional species created by Al Capp in the cartoon Li'l Abner. These small, blob-like creatures have shapes similar to the "working" volumes that would be enclosed by shmoo plots drawn against three independent variables (such as voltage, temperature, and response speed). Semiconductor chips do not usually exhibit "shmoo" shape plots. Historically, testing of magnetic core memory arrays produced the "shmoo" shape and the term continued into the semiconductor era.
Examples[edit]
Automated test equipment have traditionally generated a two-dimensional, ASCII form of the shmoo plot that uses an "X" to represent functional points and blank space for non-functional points.
If a sufficiently-wide range of variables were to be tested, a normal shmoo plot would show an operating envelope of some shape not unlike Al Capp's Shmoo, but in practice, this might damage the device under test, and finer-grained views are of much more interest, particularly focusing on published component margins (e.g., - 5% Vcc). When this is done, the operating envelope typically extends to the border of the plot in one or more directions.
Sometimes a shmoo plot has an unusual and surprising shape, and while it is difficult to determine the exact cause, it is sometimes due to some unusual defect (perhaps in only part of a circuit) coupled with otherwise normal operation. In other cases, it might be an artifact of the electrical testing setup or the test program used, in particular a race condition. As such, a shmoo plot can be a useful test setup verification tool.
A limitation of the technique is that the extended duration of testing of the device may cause additional internal device heating, resulting in a skewing of the data (later tested cells on the plot may perform worse than earlier ones). One way of avoiding this is to exercise the device thoroughly in a similar manner immediately before the actual shmoo test.
References[edit]
External links[edit]
- Shmoo Plotting: The Black Art of IC Testing – a 1996 IEEE article by Keith Baker and Jos van Beers.
- Example shmoo plot.
- Shmoo Plot Inventor
