XScale

XScale is a microarchitecture for central processing units initially designed by Intel implementing the ARM architecture (version 5) instruction set. XScale comprises several distinct families: IXP, IXC, IOP, PXA and CE (see more below), with some recent models designed as SoCs. Intel sold the PXA family to Marvell Technology Group in June 2006. Marvell then extended the brand to include processors with other microarchitectures, like ARM's Cortex.

The XScale architecture is based on the ARMv5TE ISA without the floating point instructions. XScale uses a seven-stage integer and an eight-stage memory super-pipelined microarchitecture. It is the successor to the Intel StrongARM line of microprocessors and microcontrollers, which Intel acquired from DEC's Digital Semiconductor division as part of a settlement of a lawsuit between the two companies. Intel used the StrongARM to replace its ailing line of outdated RISC processors, the i860 and i960.

All the generations of XScale are 32-bit ARMv5TE processors manufactured with a 0.18 µm or 0.13 µm (as in IXP43x parts) process and have a 32 KB data cache and a 32 KB instruction cache. First and second generation XScale multi-core processors also have a 2 KB mini data cache. Products based on the 3rd generation XScale have up to 512 KB unified L2 cache.

IXP1200

The IXP1200 is a network processor fabricated by Intel Corporation. The processor was originally a Digital Equipment Corporation (DEC) project that had been in development since late 1996. When parts of DEC's Digital Semiconductor business was acquired by Intel in 1998 as part of an out-of-court settlement to end lawsuits each company had launched at each other for patent infringement, the processor was transferred to Intel. The DEC design team was retained and the design was completed by them under Intel. Samples of the processor were available for Intel partners since 1999, with general sample availability in late 1999. The processor was introduced in early 2000 at 166 and 200 MHz. A 232 MHz version was introduced later. The processor was later succeeded by the IXP2000, an XScale-based family developed entirely by Intel.

The processor was intended to replace the general-purpose embedded microprocessors and specialized application-specific integrated circuit (ASIC) combinations used in network routers.The IXP1200 was designed for mid-range and high-end routers. For high-end models, the processor could be combined with others to increase the capability and performance of the router.

Internet exchange point

An Internet exchange point (IX or IXP) is a physical infrastructure through which Internet service providers (ISPs) and Content Delivery Networks (CDNs) exchange Internet traffic between their networks (autonomous systems).

IXPs reduce the portion of an ISP's traffic which must be delivered via their upstream transit providers, thereby reducing the average per-bit delivery cost of their service. Furthermore, the increased number of paths learned through the IXP improves routing efficiency and fault-tolerance. In addition to that, IXPs exhibit the characteristics of what economists call the network effect.

Function

The primary purpose of an IXP is to allow networks to interconnect directly, via the exchange, rather than through one or more third-party networks. The advantages of the direct interconnection are numerous, but the primary reasons are cost, latency, and bandwidth.

Traffic passing through an exchange is typically not billed by any party, whereas traffic to an ISP's upstream provider is. The direct interconnection, often located in the same city as both networks, avoids the need for data to travel to other cities (potentially on other continents) to get from one network to another, thus reducing latency.