Design & Simulation of Two Stage Operational Amplifier with Miller Compensation in Nano Regime
Author
Ms.
Rohini A. Sarode1,
Prof.
Sanjay S. Chopade2. * , **sanjay.chopade@sitrc.org Sandip
Foundations, Sandip
Institute of Technology and
Research Center (SITRC),
Nashik.
Maharastra,
INDIA. rohini_sarode@rediffmail.com
ABSTRACT
This paper presents a design procedure of basic two-stage
CMOS op amp with simulation result using LtSpice simulation tool at low capacitive load with different characteristics.
The Miller capacitor in two stage op amp induces a non-inverting feed forward signal path to the input of the 2nd stage to its output, creates an undesirable right-half-plane (
RHP) zero, which can be eliminated by using voltage buffer. My work shows the
Two-stage amplifier with
Miller compensation techniques, simulated using LtSpice simulation tool for
180, 130 and
90 nanometer CMOS technology process. While driving a 10-pF capacitive load, the amplifier achieves voltage gain approximate 20% more with exactly double gain-bandwidth (
GBW) which shows phase margin of 44.8º, 49.06º & 53.70º, slew rate of 44.48, 10.29 & 9.77V/ìs, with dissipating power value of 830μ W at 2.5V,
504.06μW at 1.5V, 486ìW at 1.2V supply voltage for 180nm, 130nm,
90nm CMOS technology respectively.
Aspire Research Foundation
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Communication Technology-ICDECT will be held during March 10 -11, 2016 at LAVASA,
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Excellent international forum for sharing knowledge and results in Computer Science and Electronics Engineering. The aim of the Conference is to provide a platform to the researchers and practitioners from both academia as well as industry to meet the share cutting-edge development in the field. The primary goal of the conference is to promote research and developmental activities in Computer Science and Electronics Engineering. Another goal is to promote scientific information interchange between researchers, developers, engineers, students, and practitioners working in and around the world. The conference will be held every year to make it an ideal platform for people to share views and experiences in Computer Science and Electronics Engineering and related areas.
All
Accepted & Registered
Papers will be published in
AISC Series of
Springer http://www.springer.com/series/11156
** Indexing: The books of this series are submitted to
ISI Proceedings, EI-Compendex,
DBLP,
SCOPUS,
Google Scholar and Springerlink **
Aspire Research Foundation
The International Conference on Data Engineering and Communication Technology-ICDECT will be held during March 10 -11, 2016 at LAVASA, Pune. ICDECT, is to bring together innovative academics and industrial experts in the field of Computer Science and Electronics Engineering to a common forum. ICDECT will provide an Excellent international forum for sharing knowledge and results in Computer Science and Electronics Engineering. The aim of the Conference is to provide a platform to the researchers and practitioners from both academia as well as industry to meet the share cutting-edge development in the field. The primary goal of the conference is to promote research and developmental activities in Computer Science and Electronics Engineering. Another goal is to promote scientific information interchange between researchers, developers, engineers, students, and practitioners working in and around the world. The conference will be held every year to make it an ideal platform for people to share views and experiences in Computer Science and Electronics Engineering and related areas.
All Accepted & Registered Papers will be published in AISC Series of Springer http://www.springer.com/series/11156
** Indexing: The books of this series are submitted to ISI Proceedings, EI-Compendex, DBLP, SCOPUS, Google Scholar and Springerlink **
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