In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is utilized like a metronome to coordinate actions of circuits. Although the word signal has a number of other meanings, the term here is used for "transmitted energy that can carry information".

A clock signal is produced by a clock generator. Although more complex arrangements are used, the most common clock signal is in the form of a square wave with a 50% duty cycle, usually with a fixed, constant frequency. Circuits using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the rising and in the falling edges of the clock cycle.

Digital circuits[link]

Most integrated circuits (ICs) of sufficient complexity use a clock signal in order to synchronize different parts of the circuit, cycling at a rate less than the worst-case internal propagation delays. In some cases, more than one clock cycle is required to perform a predictable action. As ICs become more complex, the problem of supplying accurate and synchronized clocks to all the circuits becomes increasingly difficult. The preeminent example of such complex chips is the microprocessor, the central component of modern computers, which relies on a clock from a crystal oscillator. The only exceptions are asynchronous circuits such as asynchronous CPUs.

A clock signal might also be gated, that is, combined with a controlling signal that enables or disables the clock signal for a certain part of a circuit. This technique is often used to save power by effectively shutting down portions of a digital circuit when they are not in use, but comes at a cost of increased complexity in timing analysis.

Single-phase clock[link]

Most modern synchronous circuits use only a "single phase clock" -- in other words, they transmit all clock signals on (effectively) 1 wire.

Two-phase clock[link]

In synchronous circuits, a "two-phase clock" refers to clock signals distributed on 2 wires, each with non-overlapping pulses. Traditionally one wire is called "phase 1" or "phi1", the other wire carries the "phase 2" or "phi2" signal.^[1][2][3][4]

MOS ICs typically used dual clock signals (a two-phase clock) in the 1970s. These were generated externally for both the 6800 and the 8080.^[5] The next generation of microprocessors incorporated the clock generation on chip. The 8080 had a 2 MHz clock but the processing throughput was similar to the 1 MHz 6800. The 8080 require more clock cycles to execute a processor instruction. The 6800 had a minimum clock rate of 100 kHz while the 8080 could be halted. Higher speed versions of both microprocessors were released by 1976.^[6]

The 6501 required an external 2-phase clock generator. The MOS Technology 6502 used the same 2-phase logic internally, but also included a two-phase clock generator on-chip, so it only needed a single phase clock input, simplifying system design.

4-phase clock[link]

A "4-phase clock" has clock signals distributed on 4 wires (four phase logic).^[7]

In some early microprocessors such as the National Semiconductor IMP-16 family, a multi-phase clock was used. In the case of the IMP-16, the clock had four phases, each 90 degrees apart, in order to synchronize the operations of the processor core and its peripherals.

Some ICs use four-phase logic. Intrinsity's Fast14 technology uses a multi-phase clock.

Most modern microprocessors and microcontrollers use a single-phase clock, however.

Clock multiplier[link]

Many modern microcomputers use a "clock multiplier" which multiplies a lower frequency external clock to the appropriate clock rate of the microprocessor. This allows the CPU to operate at a much higher frequency than the rest of the computer, which affords performance gains in situations where the CPU does not need to wait on an external factor (like memory or input/output).

Dynamic frequency change[link]

The vast majority of digital devices do not require a clock at a fixed, constant frequency. As long as the minimum and maximum clock times are respected, the time between clock edges can vary widely from one edge to the next. Such digital devices work just as well with a clock generator that dynamically changes its frequency, such as spread-spectrum clock generation, PowerNow!, Cool'n'Quiet, SpeedStep, etc. Devices that use static logic do not even have a maximum clock time; such devices can be slowed down and paused indefinitely, then resumed at full clock speed at any later time.

Other circuits[link]

Some sensitive mixed-signal circuits, such as precision analog-to-digital converters, use sine waves rather than square waves as their clock signals, because square waves contain high-frequency harmonics that can interfere with the analog circuitry and cause noise. Such sine wave clocks are often differential signals, because this type of signal has twice the slew rate, and therefore half the timing uncertainty, of a single-ended signal with the same voltage range. Differential signals radiate less strongly than a single line. Alternatively, a single line shielded by power and ground lines can be used.

In CMOS circuits, gate capacitances are charged and uncharged continually. A capacitor does not dissipate energy, but energy is wasted in the driving transistors. In reversible computing, inductors can be used to store this energy and reduce the energy loss, but they tend to be quite large. Alternatively, using a sine wave clock, CMOS transmission gates and energy-saving techniques, the power requirements can be reduced.^{[citation needed]}

Distribution[link]

It has been suggested that clock distribution network be merged into this article or section. (Discuss) Proposed since August 2011.

The most effective way to get the clock signal to every part of a chip that needs it, with the lowest skew, is a metal grid. In a large microprocessor, the power used to drive the clock signal can be over 30% of the total power used by the entire chip.^[8][9] The clock signal must be propagated with a clock distribution network. This is often done with a recursive H tree. The whole structure with the gates at the ends and all amplifiers in between have to be loaded and unloaded every cycle. To save energy, unused parts of the tree may be temporarily cut off (clock gating).

See also[link]

• Self-clocking signal
• Four-phase logic
• Jitter
• Programmable Interval Timer
• Synchronous circuit
• Bit-synchronous operation
• Clock rate

References[link]