The timer could run in either "one-shot" mode, halting after the first interrupt, or "continuous" mode, reloading the latch value again and starting the timer cycle anew. In addition to generating interrupts, the timer output could also be gated to the second I/O port.
As configured in the Commodore 64 and Commodore 128, the CIA's timing was controlled by the phase two system clock, nominally one MHz. This meant that the timers decremented at approximately one microsecond intervals, the exact time period being determined by whether the system used the NTSC or PAL video standard. In the C-128, clock stretching was employed so the CIA's timing was unaffected by whether the system was running in SLOW or FAST mode.
It was possible to generate relatively long timing intervals by programming timer B to count timer A underflows. If both timers were loaded with the maximum interval value of 65,535, a timing interval of one hour, 11 minutes, 34 seconds would result.
Reading from the registers will always return the time of day. In order to avoid a carry error while fetching the time, reading the hours register will immediately halt register updating, with no effect on internal timekeeping accuracy. Once the tenths register has been read, updating will resume. It is possible to read any register other than the hours register "on the fly," making the use of a running TOD clock as a timer a practical application. If the hours register is read, however, it is essential to subsequently read the tenths register. Otherwise, all TOD registers will remain "frozen."
Setting the time involves writing the appropriate BCD values into the registers. A write access to the hours register will completely halt the clock. The clock will not start again until a value has been written into the tenths register. Owing to the order in which the registers appear in the system's memory map, a simple loop is all that is required to write the registers in the correct order. It is permissible to write to only the tenths register to "nudge" the clock into action, in which following a hardware reset, the clock will start at 1:00:00.0.
In addition to its timekeeping features, the TOD can be configured to act as an alarm clock, by arranging for it to generate an interrupt request at any desired time. Due to a bug in many 6526s (see also errata below), the alarm IRQ would not always occur when the seconds component of the alarm time is exactly zero. The workaround is to set the alarm's tenths value to 0.1 seconds.
The TOD clock's internal circuitry is designed to be driven by an AC input signal, either 50 or 60 Hz, as would be derived from the mains power source, resulting in a stable timekeeper with little long-term drift. The ability to work with both power line frequencies allowed a single version of the 6526 to be used in computers using either the NTSC or PAL video standards. In Commodore 8-Bit systems, the operating system will determine the locally used mains frequency during system startup, but it will not notify the CIA chips of it. Thus, it is the responsibility of any application software that wants to use either CIA's TOD function to request this information from the OS and then feed it to the used CIA(s). Failure to do so will cause the clock to deviate quickly from the correct time.
The 8520 revision of the CIA, used in the Amiga, modified the time-of-day clock to be a 24-bit binary counter, replacing the BCD format of the 6526. Other behavior was similar, however.
Commodore made a reduced (just 4 registers) CIA for the 1571CR called 5710.
Category:Commodore 64 Category:Amiga Category:Integrated circuits
de:MOS Technology CIA el:MOS Technology CIA it:MOS 6526This text is licensed under the Creative Commons CC-BY-SA License. This text was originally published on Wikipedia and was developed by the Wikipedia community.
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